RTL - GDS flow

The flow chart for the GDS – RTL flow is shown below :

Steps to each run viz. synthesis, PNR, STA :

• Convert the pin details in milkyway format

• Invoke icc_shell
• Set ICC variables
• Set lib, design, reference, tech file, TLU Plus file, map file ( All common setting), netlist, scan def, sdc file
• Open .lib and design.
• Read input netlist, scan def, sdc file
• Do the floorplan
• Read the pin details.
• Create blockages and power straps
• Enter spare cell details
• Define false paths
• Do coarse placement and check for congestion
• Do routing and check for timing
• Close all drc/ lvs errors and ensure timing is met
• Do DFM improvements ( filler cell insertion, double via, spread wire )
• Ensure timing drc /lvs are clean